View FDS8928A_184198.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

July 1998
FDS8928A Dual N & P-Channel Enhancement Mode Field Effect Transistor
General Description
These dual N- and P -Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as notebook computer power management and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.
Features
N-Channel 5.5 A,30 V, RDS(ON)=0.030 @ VGS=4.5 V RDS(ON)=0.038 @ VGS=2.5 V. P-Channel -4 A,-20 V, RDS(ON)=0.055 @ VGS=-4.5 V RDS(ON)=0.072 @ VGS=-2.5 V. High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. Dual (N & P-Channel) MOSFET in surface mount package.
SOT-23
SuperSOTTM-6
SuperSOTTM-8
SO-8
SOT-223
SOIC-16
D2 D1 D1 D2
5 6 7
4 3 2 1
S FD 8A 2 89
S2 G2 G1
8
SO-8
pin 1
S1
Absolute Maximum Ratings
Symbol VDSS VGSS ID Parameter Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed PD
T A = 25C unless otherwise noted
N-Channel 30 8
(Note 1a)
P-Channel -20 -8 -4 -20 2
Units V V A
5.5 20
Power Dissipation for Dual Operation Power Dissipation for Single Operation
(Note 1a) (Note 1b) (Note 1c)
W
1.6 1 0.9 -55 to 150 C
TJ,TSTG
Operating and Storage Temperature Range
THERMAL CHARACTERISTICS RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)
78 40
C/W C/W
(c) 1998 Fairchild Semiconductor Corporation
FDS8928A Rev. B
Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol Parameter Conditions Type Min Typ Max Units OFF CHARACTERISTICS BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 A VGS = 0 V, ID = -250 A ID = 250 A, Referenced to 25 oC ID = -250 A, Referenced to 25 oC IDSS IGSSF IGSSR VGS(th) Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V VDS = -16 V, VGS = 0 V Gate - Body Leakage, Forward Gate - Body Leakage, Reverse VGS = 8 V, VDS = 0 V VGS = -8 V, VDS = 0 V VDS = VGS, ID = 250 A VDS = VGS, ID = -250 A ID = 250 A, Referenced to 25 C ID = -250 A, Referenced to 25 C RDS(ON) Static Drain-Source On-Resistance VGS = 4.5 V, ID = 5.5 A VGS = 2.5 V, ID = 4.5 A VGS = -4.5 V, ID = -4 A VGS = -2.5 V, ID = -3.4 A ID(on) gFS On-State Drain Current VGS = 4.5 V, VDS= 5 V VGS = -4.5 V, VDS= -5 V Forward Transconductance VDS = 5 V, I D = 5.5 A VDS = -5 V, I D = -4 A DYNAMIC CHARACTERISTICS Ciss Coss Crss Input Capacitance VDS = 10 V, VGS = 0 V, f = 1.0 MHz N-Ch P-Ch N-Ch VDS = -10 V, VGS = 0 V, f = 1.0 MHz P-Ch N-Ch P-Ch 900 1130 410 480 110 120 pF pF pF N-Ch P-Ch N-Ch P-Ch 20 -20 20 13 S S P-Ch
o o
N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch All All
30 -20 32 -23 1 -1 100 -100
V V mV/oC
BVDSS/TJ Breakdown Voltage Temp. Coefficient
A A nA nA
ON CHARACTERISTICS (Note 2) Gate Threshold Voltage N-Ch P-Ch N-Ch P-Ch N-Ch 0.4 -0.4 0.67 -0.6 -3 4 0.025 0.031 0.043 0.059 0.03 0.038 0.055 0.072 A 1 -1 V V mV/oC
VGS(th)/TJ
Gate Threshold Voltage Temp. Coefficient
Input Capacitance
Reverse Transfer Capacitance
FDS8928A Rev. B
Electrical Characteristics (continued)
SWITCHING CHARACTERISTICS Symbol tD(on) Parameter Turn - On Delay Time
(Note 2)
Conditions VDS = 6 V, I D = 1 A VGS = 4.5 V , RGEN = 6
Type N-Ch P-Ch N-Ch P-Ch
Min
Typ 6 8 19 23 42 260 13 90 19.8 20 2 2.8 6.3 3.2
Max 12 16 31 37 67 360 24 125 28 28
Units ns
tr tD(off)
Turn - On Rise Time
ns
Turn - Off Delay Time
VDS= -10 V, I D = -1 A VGS = -4.5 V , RGEN = 6
N-Ch P-Ch N-Ch P-Ch
ns
tf Qg Qgs Qgd
Turn - Off Fall Time
ns
Total Gate Charge
VDS = 10 V, I D = 5.5 A, VGS = 4.5 V
N-Ch P-Ch N-Ch
nC
Gate-Source Charge VDS = -5 V, I D = -4 A, Gate-Drain Charge VGS = -5 V
nC
P-Ch N-Ch P-Ch
nC
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS VSD
Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design.
Maximum Continuous Drain-Source Diode Forward Current
N-Ch P-Ch
1.3 -1.3 0.68 -0.7 1.2 -1.2
A A V V
Drain-Source Diode Forward Voltage
VGS = 0 V, IS = 1.3 A VGS = 0 V, IS = -1.3 A
(Note 2) (Note 2)
N-Ch P-Ch
a. 78OC/W on a 0.5 in2 pad of 2oz copper.
b. 125OC/W on a 0.02 in2 pad of 2oz copper.
c. 135OC/W on a 0.003 in2 pad of 2oz copper.
Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%..
FDS8928A Rev. B
Typical Electrical Characteristics: N-Channel
30 I D , DRAIN-SOURCE CURRENT (A)
2.5V
R DS(ON) , NORMALIZED
24
3.0V 2.0V
DRAIN-SOURCE ON-RESISTANCE
VGS = 4.5V
2
1.6
18
VGS = 2.0V 2.5 V
1.2
12
3.0V 3.5 V 4.5V
6
1.5V
0 0 1 2 3 4 5 VDS , DRAIN-SOURCE VOLTAGE (V)
0.8 0 6 12 18 24 30 I D , DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
1.8 DRAIN-SOURCE ON-RESISTANCE
R DS(ON) , NORMALIZED
0.1
R DS(ON) , ON-RESISTANCE (OHM)
1.6 1.4 1.2 1 0.8 0.6 -50
I D = 5.5 A VGS = 4.5 V
0.075
I D = 3A
0.05
TA = 125C
0.025
25C
0 1 V 2
GS
-25
0
25
50
75
100
125
150
3
4
5
TJ , JUNCTION TEMPERATURE (C)
, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with Temperature.
Figure 4. On-Resistance Variation with Gate-to-Source Voltage.
V DS =5V
I D , DRAIN CURRENT (A) 16
TA = -55C 25C 125C
I S , REVERSE DRAIN CURRENT (A)
20
20 V GS = 0V 1 TA = 125C 0.1 25C -55C 0.01
12
8
4
0.001
0
0.0001 0 0.5 V
GS
1
1.5
2
2.5
3
0
0.2
0.4
0.6
0.8
1
1.2
, GATE TO SOURCE VOLTAGE (V)
VSD , BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.
FDS8928A Rev. B
Typical Electrical Characteristics: N-Channel (continued)
5 VGS , GATE-SOURCE VOLTAGE (V) 3000
ID = 5.5A
4
CAPACITANCE (pF)
VDS = 5V 10V 15V
1000 500
C iss C oss
3
2
200
80 1 30 0.1
f = 1 MHz V GS = 0V
0.4 1 2 5 10
C rss
0 0 5 10 15 20 25 Q g , GATE CHARGE (nC)
30
VDS , DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
50
S(O N IM )L IT
30
I D , DRAIN CURRENT (A)
10 3 1 0.3 0.1 0.03 0.01 0.1
RD
1m 10m 100 1s 10s DC ms s
100 s
us
POWER (W)
25 20 15 10 5 0 0.01
SINGLE PULSE RJA =135 C/W TA = 25C
VGS = 4.5V SINGLE PULSE RJA =135 C/W TA = 25C
0.2 0.5 1 2
0.1
0.5
10
50 100
300
5
10
20 30
50
SINGLE PULSE TIME (SEC)
VDS , DRAI N-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power Dissipation.
FDS8928A Rev. B
Typical Electrical Characteristics: P-Channel
-ID , DRAIN-SOURCE CURRENT (A) DRAIN-SOURCE ON-RESISTANCE 30 2
VGS = -4.5V
-3.5V -3.0V - 2.5V
R DS(ON), NORMALIZED
24
1.6
18
VGS = - 2.0V -2.5 V
1.2
-2.0V
12
-3.0 V -3.5V -4.5V
6
-1.5V
0
0.8 0 1 2 3 4 5 - VDS , DRAIN-SOURCE VOLTAGE (V)
0
6
12
18
24
30
-I D , DRAIN CURRENT (A)
Figure 11. On-Region Characteristics.
Figure 12. On-Resistance Variation with Drain Current and Gate Voltage.
1.6 DRAIN-SOURCE ON-RESISTANCE
0.2
R DS(ON) , ON-RESISTANCE (OHM)
I D = -4.0A
1.4
I D = -2A
0.15
V GS = -4.5V
R DS(ON), NORMALIZED
1.2
0.1
1
TA = 125C
0.05
0.8
25C
0
0.6 -50
-25
0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C)
125
150
0
1
2
3
4
5
-VGS , GATE TO SOURCE VOLTAGE (V)
Figure 13. On-Resistance Variation with Temperature.
Figure 14. On-Resistance Variation with Gate-to-Source Voltage.
- IS , REVERSE DRAIN CURRENT (A)
10
10
VDS = -5V
- ID , DRAIN CURRENT (A) 8
TJ = -55C 25C 125C
VGS = 0V
3 1
6
0.1
TJ =125C 25C -55C
4
0.01
2
0 0.4
0.001 0.8 1.2 1.6 2 -VGS , GATE TO SOURCE VOLTAGE (V)
0
0.2
0.4
0.6
0.8
1
1.2
-VSD , BODY DIODE FORWARD VOLTAGE (V)
Figure 15. Transfer Characteristics.
Figure 16. Body Diode Forward Voltage Variation with Source Current and Temperature.
FDS8928A Rev. B
Typical Electrical Characteristics: P-Channel (continued)
5 -V GS , GATE-SOURCE VOLTAGE (V) 3000
ID =-4.0A VDS = -5V
CAPACITANCE (pF)
2000 1000 500
4
C iss
-10V -15V
3
Coss
2
200
C rss
1 100 50 0.1 0 4 8 12 16 20 Q g , GATE CHARGE (nC)
f = 1 MHz V GS = 0 V
0.2 0.5 1 2 5 10 20 -VDS , DRAIN TO SOURCE VOLTAGE (V)
0
Figure 17. Gate Charge Characteristics.
Figure 18. Capacitance Characteristics.
50 20 - ID , DRAIN CURRENT (A) 10 5
) ON S( RD IT LIM
30
100
1m 10m s 10 0m s s
us
POWER (W)
25 20 15 10 5 0 0.01
SINGLE PULSE R JA =135 C/W TA = 25C
1 0.3 0.1 0.03 0.01 0.1
V GS = -4.5V SINGLE PULSE RJA = 135C/W TA = 25C A
0.2 0.5 1 2
1s 10s DC
0.1
0.5
10
50 100
300
5
10
20 30
50
SINGLE PULSE TIME (SEC)
- VDS , DRAIN-SOURCE VOLTAGE (V)
Figure 19. Maximum Safe Operating Area.
Figure 20. Single Pulse Maximum Power Dissipation.
FDS8928A Rev. B
Typical Thermal Characteristics: N & P-Channel (continued)
1 0.5 0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 0.0001 0.001 0.01 0.1 t1 , TIME (sec) 1 10
D = 0.5 0.2 0.1 0.05 0.02 0.01 Single Pulse P(pk)
r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE
R JA (t) = r(t) * R JA R JA =135C/W
t1
t2
TJ - TA = P * R JA (t) Duty Cycle, D = t1 /t2
100
300
Figure 21. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in note 1. Transient thermalresponse will change depending on the circuit board design.
FDS8928A Rev. B
SO-8 Tape and Reel Data and Package Dimensions
SOIC(8lds) Packaging Configuration: Figure 1.0
Packaging Description:
EL ECT ROST AT IC SEN SIT IVE DEVICES
DO NO T SHI P OR STO RE N EAR ST RO NG EL ECT ROST AT IC EL ECT RO M AGN ETI C, M AG NET IC O R R ADIO ACT IVE FI ELD S
TNR D ATE PT NUMB ER PEEL STREN GTH MIN ___ __ ____ __ ___gms MAX ___ ___ ___ ___ _ gms
Antistatic Cover Tape
ESD Label
SOIC-8 parts are shipped in tape. The carrier tape is made from a dissipative (carbon filled) polycarbonate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped with 2,500 units per 13" or 330cm diameter reel. The reels are dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 500 units per 7" or 177cm diameter reel. This and some other options are further described in the Packaging Information table. These full reels are individually barcode labeled and placed inside a standard intermediate box (illustrated in figure 1.0) made of recyclable corrugated brown paper. One box contains two reels maximum. And these boxes are placed inside a barcode labeled shipping box which comes in different sizes depending on the number of parts shipped.
Static Dissipative Embossed Carrier Tape
F63TNR Label Customized Label
F852 NDS 9959 F852 NDS 9959 F852 NDS 9959 F852 NDS 9959
SOIC (8lds) Packaging Information Packaging Option Packaging type Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg) Note/Comments Standard (no flow code) TNR 2,500 13" Dia 343x64x343 5,000 0.0774 0.6060 L86Z Rail/Tube 95 530x130x83 30,000 0.0774 F011 TNR 4,000 13" Dia 343x64x343 8,000 0.0774 0.9696 D84Z TNR 500 7" Dia 184x187x47 1,000 0.0774 0.1182
F852 NDS 9959
Pin 1
SOIC-8 Unit Orientation
343mm x 342mm x 64mm Standard Intermediate box ESD Label F63TNR Label sample
LOT: CBVK741B019 FSID: FDS9953A QTY: 2500 SPEC:
F63TNLabel F63TN Label ESD Label
(F63TNR)3
D/C1: D9842 D/C2:
QTY1: QTY2:
SPEC REV: CPN: N/F: F
SOIC(8lds) Tape Leader and Trailer Configuration: Figure 2.0
Carrier Tape Cover Tape
Components Trailer Tape 640mm minimum or 80 empty pockets Leader Tape 1680mm minimum or 210 empty pockets
July 1999, Rev. B
SO-8 Tape and Reel Data and Package Dimensions, continued
SOIC(8lds) Embossed Carrier Tape Configuration: Figure 3.0
T E1
P0
D0
F K0 Wc B0 E2 W
Tc A0 P1 D1
User Direction of Feed
Dimensions are in millimeter Pkg type SOIC(8lds) (12mm)
A0
6.50 +/-0.10
B0
5.30 +/-0.10
W
12.0 +/-0.3
D0
1.55 +/-0.05
D1
1.60 +/-0.10
E1
1.75 +/-0.10
E2
10.25 min
F
5.50 +/-0.05
P1
8.0 +/-0.1
P0
4.0 +/-0.1
K0
2.1 +/-0.10
T
0.450 +/0.150
Wc
9.2 +/-0.3
Tc
0.06 +/-0.02
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481 rotational and lateral movement requirements (see sketches A, B, and C).
20 deg maximum Typical component cavity center line
0.5mm maximum
B0 20 deg maximum component rotation
0.5mm maximum
Sketch A (Side or Front Sectional View)
Component Rotation
A0 Sketch B (Top View)
Typical component center line
Sketch C (Top View)
Component lateral movement
SOIC(8lds) Reel Configuration: Figure 4.0
Component Rotation
W1 Measured at Hub
Dim A Max
Dim A max
Dim N
See detail AA
7" Diameter Option
B Min Dim C See detail AA W3
Dim D min
13" Diameter Option
W2 max Measured at Hub DETAIL AA
Dimensions are in inches and millimeters
Tape Size
12mm
Reel Option
7" Dia
Dim A
7.00 177.8 13.00 330
Dim B
0.059 1.5 0.059 1.5
Dim C
512 +0.020/-0.008 13 +0.5/-0.2 512 +0.020/-0.008 13 +0.5/-0.2
Dim D
0.795 20.2 0.795 20.2
Dim N
2.165 55 7.00 178
Dim W1
0.488 +0.078/-0.000 12.4 +2/0 0.488 +0.078/-0.000 12.4 +2/0
Dim W2
0.724 18.4 0.724 18.4
Dim W3 (LSL-USL)
0.469 - 0.606 11.9 - 15.4 0.469 - 0.606 11.9 - 15.4
12mm
13" Dia
(c) 1998 Fairchild Semiconductor Corporation
July 1999, Rev. B
SO-8 Tape and Reel Data and Package Dimensions, continued
SOIC-8 (FS PKG Code S1)
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in: inches [millimeters]
Part Weight per unit (gram): 0.0774
9
September 1998, Rev. A
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM CoolFETTM CROSSVOLTTM E2CMOSTM FACTTM FACT Quiet SeriesTM FAST(R) FASTrTM GTOTM HiSeCTM
DISCLAIMER
ISOPLANARTM MICROWIRETM POPTM PowerTrenchTM QFETTM QSTM Quiet SeriesTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8
TinyLogicTM UHCTM VCXTM
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

▲Up To Search▲

Price & Availability of FDS8928A

	To Download FDS8928A Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .